TTTC: LPonTR 2011 Call for Participation

CALL FOR PARTICIPATION

Scope -- Workshop Registration -- Advance Program -- Additional Information -- Committees

Scope

The IEEE InternationalWorkshop on Impact of Low Power Design on Test and Reliability (LPonTR) aims to bring together design, reliability and test engineers and researchers to discuss the impact of advanced low-power low-voltage design methodologies of nanometer silicon systems on test and reliability. Power and thermal issues, leakage, process variations, susceptibility to environmental and operation-induced interference drive the development of low-power, process-tolerant design techniques and generate a new set of test and reliability challenges, questing for an innovative set of methodologies and tools.

Workshop Registration

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Please refer to the ETS web site at: http://www.iet.ntnu.no/workshop/ets2011/

Advance Program

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The technical program of the workshop can be downloaded at: http://www.iet.ntnu.no/workshop/ets2011/LPonTR.shtml

Additional Information

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Dr. Alex Bystrov
Newcastle University
School of EECE
Newcastle upon Tyne, NE1 7RU, UK
Tel.: +44 191 222 6584
Fax: +44 191 222 8180
Email: A.Bystrov@ncl.ac.uk

Dr. Patrick Girard
LIRMM
161 rue Ada,
34392 Montpellier cedex 05, France
Tel.: +33 467 418 629
Fax.: +33 467 418 500
Email: girard@lirmm.fr

Committees

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Chair / Co-Chair
Alex Bystrov, Newcastle Univ., UK
Patrick Girard, LIRMM, France

Special Session Chairs
Ilia Polian, Univ. Freiburg, Germany
Gert Jervan, Tallinn Univ., Estonia

Programme Committee
Bashir Al-Hashimi, Univ. of Southampton, UK
Karim Arabi, Qualcomm, USA
Swarup Bhunia, Case Western Reserve Univ., USA
Krish Chakrabarty, Duke Univ., USA
Krishna Chakravadhanula, Cadence, USA
Luigi Dilillo, LIRMM, France
Peter Harrod, ARM Ltd, UK
Mokhtar Hirech, Synopsys, USA
Gert Jervan, Tallinn Univ., Estonia
Niraj Jha, Princeton University, USA
Mark Kassab, Mentor Graphics, USA
Sandip Kundu, Univ. Massachusetts, USA
Erik Larsson, Linkoping Univ., Sweden
T.M. Mak, Intel, USA
Hans Manhaeve, Q-Star, Belgium
Nicola Nicolici, McMaster Univ., Canada
Ilia Polian, Univ. Freiburg, Germany
Irith Pomeranz, Purdue Univ., USA
Srivaths Ravi, TI, India
Sudhakar Reddy, Univ. of Iowa, USA
Juan Jose Rodriguez Andina,
Univ. Vigo, Spain
Ozgur Sinanoglu, Univ. NYUAD, Abu Dhabi
Virendra Singh, Indian Institute of Science, India
Mohammad Tehranipoor, Univ. Connecticut, US
J. Paulo Teixeira, INESC-ID, Portugal
Nur Touba, Univ. of Texas at Austin, USA
Seongmoon Wang, NEC, USA
Xiaoqing Wen, Kyushu Inst. of Technology, Japan
Hans-Joachim Wunderlich, Univ. of Stuttgart, Germany
Qiang Xu, The Chinese University of Hong Kong

For more information, visit us on the web at: http://www.staff.ncl.ac.uk/a.bystrov/LPonTR/

The 4th IEEE International Workshop on Impact of Low-Power design on Test and Reliability (LPonTR 2011) is sponsored by the Institute of Electrical and Electronics Engineers (IEEE) Computer Society's Test Technology Technical Council (TTTC).